First, “data processing concerning the time series data” will be explained. In this description, “data processing concerning the time series data” means a process that is carried out for time series input data, that is, a series of data inputted one after another. Results data of the data processing concerning the time series data is also outputted one after another similarly. “To be inputted one after another” means that a plurality of data arrives at a processing device at different timing over a certain period of time respectively. As an example of the data processing concerning the time series data, such as a process that calculates a sum of nearest two values of the time series data can be mentioned. Hereinafter, the data processing concerning the time series data is simply called as “the time series data processing”.
In the following explanation, an array of data is represented as [1, 2, 3, 4], a set (collection of elements) of data is represented as {1, 2, 3, 4}, and a set of data is represented as <10 degrees, January 1> by distinguishing them with different kinds of parentheses. Also, individual numerical values of data such as 1 and 2 are transcribes as “1” and “2” and are distinguished from codes that show components.
Also, a period of a clock used for operation of a time series data processing device is called “a cycle”, and it is used as a unit of a period of time. “Start time of cycle” means the first point of time of the period of time and “end time of cycle” means the last point of time of the period of time. For example, in case a frequency of a clock is 1 GHz, concerning a certain reference time, the first cycle means a period of time between the reference time plus zero second and the reference time plus 1 nanosecond, and the N-th cycle means a period of time between the reference time plus (N−1) nanoseconds and the reference time plus N nanoseconds. Start time of the M-th cycle means the reference time plus (M−1) nanoseconds, and end time of the M-th cycle means the reference time plus M nanoseconds.
Here, input data is a set consisting of no smaller than one value. As an example, a set of temperature and date, a set of temperatures only and a set of brand name, stock price and time can be mentioned. For example, the set of temperature and date is represented as <10 degrees, January 1>. In case there is no concern that they are confused, input data and a value handled by a device are simply called “data”.
The time series data processing is often carried out to a plurality of input data. Further, the time series data processing is often carried out to a window of time series data. “Window” is a set (collection of elements) of input data, and there are two kinds. One is, supposing that a predefined number is N (N is an integer of no smaller than 1), a set (collection of elements) of input data of nearest N pieces. The other is, supposing that a period of time at a certain predefined time is P and regarding one element of a set of input data as time, a set (collection of elements) of input data that fits into the period of time.
For example, it is supposed that input data is a set of temperature and date, and that time series data such as <10 degrees, January 1>, <11 degrees, January 2>, <10 degrees, January 3> and <10 degrees, January 4> are given. The window that fits into a period of time from January 4 to the last 3 days is {<11 degrees, January 2>, <10 degrees, January 3> and <10 degrees, January 4>}.
Also, a set (collection of elements), a subset (collection of elements) and an element of input data in a window are called “window data”. In the time series data processing, this window data is often stored. In the following explanation, the window or the window data is represented as an array or a set (collection of elements).
It is supposed that time series data processing is executed using an IC (Integrated Circuit) chip that has in plural an area (hereinafter, referred to as “a partition”) that can define contents of a process and specifically, an area in which circuit information and so on for constructing a circuit that executes the process can be written. As an example of such an IC chip, an FPGA (Field Programmable Gate Array) can be mentioned. Or, it is possible to execute the time series data processing by using, as the IC chip, a processor that reads a program from a memory and executes it. In this case, the process contents, that is, a program that designates a procedure of the process, may be written in the memory.
In the time series data processing, it is supposed that a first user defined process (referred to as “a process to be updated”) is being executed in the first partition, and a second user defined process (referred to as “an old process”) is being executed in the second partition. At this time, there exist needs that wants to change the process to be updated to a third user defined process (referred to as “a new process”) while continuing execution of the old process. That is, while continuing execution of the old process in the second partition, the process to be updated in the first area is stopped and changed to the new process. And execution of the new process is started, and after that, the old process in the second area is stopped. By changing from the old process to the new process by the procedure as mentioned above, it is possible, while guaranteeing temporal continuity, to change the process contents of the time series data processing device.
As an example, consider an application that calculates an index to decide timing to purchase or sell financial products such as a stock. Depending on a brand of financial products to be purchased or sold and a strategy to purchase or sell, there exists a plurality of indices that is necessary, and sets (collection of elements) of the indices that should be outputted are different. A certain device can calculate only a finite number of indices simultaneously. Depending on time, the brand to be purchased or sold and the strategy change. Therefore, there exist needs that want to change the indices to be calculated depending on the brand to be purchased or sold at that time and on the strategy.
An example of change of processes in the background art will be explained using FIG. 25. It is supposed that an old process that calculates a sum of nearest two values is changed to a new process that calculates a sum of nearest three values.
Also, it is supposed that data is inputted every 1 cycle, and explanation will be made by using time with 1 cycle as a unit.
At start time of the first cycle, time series data 1 is inputted and the old process stores the value as window data.
At start time of the second cycle, time series data 2 is inputted and the old process stores the value as window data. Also, since the old process obtained nearest two values, “3” is outputted as results data.
At start time of the third cycle, an instruction to rewrite to circuit information that executes the new process is issued. It is supposed that the process operating in an area where the circuit information that executes the new process is planned to be written is stopped, and further, the circuit information that executes the new process is written in a device and operation has started. Here, it is supposed that the circuit information that executes the new process is written in an area different from the old process and the old process and the new process operate in parallel for a while.
At start time of the third cycle, time series data “3” is inputted and the new process stores the value as window data.
At start time of the fourth cycle, time series data “4” is inputted and the new process stores the value as window data.
At start time of the fifth cycle, time series data “5” is inputted and the new process stores the value as window data. Also, since the new process obtained nearest three values, “12” is outputted as results data.
Here, the old process is stopped or deleted, and the change of the processes is completed.
Further, there is a case when control is desired concerning output order of the results of the new process and the results of the old process to device exterior and selection of the process results as output target from the results of the new process and the results of the old process. In particular, it is important to make the results of the new process and the results of the old process not to be outputted to device exterior being mixed. Further, it is also effective to output, among the results of the old process before and after the process is changed, those that are still useful and available after execution of the new process has started to device exterior to the maximum. Further, to control the output order and the selection of the output target and to output the desired results in the desired order is called “to align”. Detained explanation related to “alignment” will be described later.
As an example, consider the application mentioned above that calculates an average of the values of the temperature sensor over a certain period of time and detects an emergency situation including a fire. At this time, when temperature change has become intense, in order to raise speed that follows the temperature change, it is desirable to change a width of the period of time to calculate the average of the temperature. Also, in order that the results of the old process and the new process are not confused, it is also necessary to change the processes so that both of the results may not be outputted to device exterior being mixed. Further, since also the results of the old process are still useful and available, it is desirable to receive the results of the old process from the device as much as possible until the results of the new process are outputted to device exterior. Needs as described above exist.
As another example, consider an application that carries out an order to purchase or sell financial products such as a stock. Since it is desired to change a brand to be purchased or sold, it is necessary to change the process of instruction to purchase or sell. The brand before the change is called “an old brand”, and the brand after the change is called “a new brand”. Also, when instructions related to the new and the old brand are mixed before and after the processes are changed, there is a concern that purchasing or selling may be mistaken. Therefore, it is necessary that the processes are changed while the results of both the new and the old process may not be outputted to device exterior being mixed. Also, since instructions to purchase or sell may be carried out to the old brand until the last timing, it is desirable to receive the results of the old process from the device as much as possible until the results of the new process are outputted to device exterior. Needs as described above exist.
Further, there are requirements that the user defined process cannot be stopped until the status that the process has been completed is reached, and accordingly, the partition in which the user defined process is operating cannot be made a target to write the circuit information that executes the new process.
As an example, consider the application mentioned above that issues the order to purchase or sell financial products such as a stock. Here, it is supposed that there is a rule that an order to purchase issued from the application and an order to sell issued after a while consecutively must be made a set. Once the process to carry out the order to purchase or sell has issued the order to purchase, after that, a user cannot stop the process until the process issues the order to sell. After that, during a period of time until the process issues next order to purchase, the user can stop the process. After that, when the process issues the order to purchase, the user cannot stop the process again.
That is, while the old process is operating in the second area of a device, by writing the circuit information that executes the new process in the first area of the device where the first user defined process (process to be updated) is operating, change from the old process to the new process is to be realized. At this time, there exist requirements that writing of the circuit information that executes the new process in the first area has to be carried out in a period of time after the process to be updated is completed.
Technologies related to the processes as above are described in PTL 1, 2 and 3 and NPL 1.
In PTL 1, a time series data processing device that can be reconstructed is disclosed. A block diagram of the time series data processing device of PTL 1 is shown in FIG. 26. The technology of PTL 1 is constructed in order to execute a process that a user defined, and includes a processing unit 621, a processing control unit 611, a reconstruction unit 622 and an output connection unit 631 that connects results of the processing unit to an output port to exterior. The processing unit 621 executes the process, and the processing control unit 611 controls start and stop of the process that operates in the processing unit 621. The reconstruction unit 622 carries out reconstruction of the processing unit 621. The output connection unit 631 connects or interrupts the processing unit 621 and the output port to exterior.
In PTL 2, an information processing system that can be reconstructed using a programmable logic circuit is disclosed. In the system of PTL 2, by using logic cell status data that reflects usage state of a logic cell of the programmable logic circuit, usable logic cells are discriminated.
In PTL 3, a reconfigurable circuit is disclosed. In the reconfigurable circuit of PTL 3, a reconstruction cell is equipped with a reset flag, and it is set to a protection mode that protects the reconstruction cell from reset or to a normal mode that does not protect it from reset.
In NPL 1, a time series data processing device that can be reconstructed is disclosed.
A block diagram of the time series data processing device of NPL 1 is shown in FIG. 27. The technology of NPL 1 is equipped with a host computer 501, a processing unit 521, a processing control unit 511, a reconstruction unit 522 and an output connection unit 531. The host computer 501 orders to change processes. The processing unit 521 is an area in which construction of a circuit that executes a process that a user defined (setting of circuit information that executes the process) is possible, and executes the process. The processing control unit 511 carries out start and stop of the process that operates in the processing unit 521. The reconstruction unit 522 carries out reconstruction of the processing unit 521. The output connection unit 531 transmits results of the processing unit 521 to an output port to device exterior.
Operation of the technology of NPL 1 will be explained using FIG. 28 to FIG. 33.
Here, from a status that a first process that calculates a sum of nearest two values is executed, operation to write a second process that calculates a sum of nearest three values will be explained. It is supposed that timing related to the processes is as follows.
1) Both the first process and the second process generate results in the same cycle as the cycle in which data is inputted.
2) The results of the process reach from the processing unit 521 to the output connection unit 531 in 1 cycle.
3) Data is inputted every 1 cycle. In the following explanation, time that makes 1 cycle as a unit is used.
At start time of the first cycle, the host computer 501 and the processing start unit 511 are in the status that the first process that operates in the processing unit 521 has been started. The output connection unit 531 enables output of the results of the first process to device exterior. Specifically, the output connection unit 531 connects output of the processing unit 521 to the output port.
At start time of the first cycle, “1” is inputted as time series data, and at start time of the second cycle, “2” is inputted as time series data. Since the first process obtained [1, 2] that are nearest two values, the processing unit 501 calculates and outputs “3” as the result. At end time of the second cycle, each part will be in the status as in FIG. 28.
At start time of the third cycle, an order to write the second process is issued from the host computer 502. The host computer 502 issues an order to the processing control unit 511 to reset the process that operates in the processing unit 521. The processing control unit 511 resets the process that operates in the processing unit 521. Further, the processing control unit 511 issues an order to the output connection unit 531 to interrupt output of the results of the process of the processing unit 521 to device exterior. The output connection unit 531 interrupts the connection of the processing unit 521 and the output port. At end time of the third cycle, each part will be in the status as in FIG. 29.
At start time of the fourth cycle, the host computer 502 sends construction information to the reconstruction unit 522. The reconstruction unit 522 sends the construction information to the processing unit 521. At end time of the fourth cycle, each part will be in the status as in FIG. 30.
At end time of the thirteenth cycle, reconstruction is completed. At start time of the fourteenth cycle, the reconstruction unit 522 notifies the processing control unit 511 of reconstruction completed. At end time of the fourteenth cycle, each part will be in the status as in FIG. 31.
At start time of the fourteenth cycle, the processing control unit 511 starts the process written in the processing unit 521. For example, the processing control unit 511 dis-asserts a reset signal. Further, the processing control unit 511 checks whether the process has started. For example, the processing control unit 511 checks whether a specific bit pattern is outputted from the processing unit 521.
At start time of the fifteenth cycle, the processing control unit 511 orders the output connection unit 531 to enable output of the results of the second process to device exterior. The output connection unit 531 enables output of the results of the second process to device exterior. Specifically, the output connection unit 531 connects output of the processing unit 521 to the output port. At end time of the fifteenth cycle, each part will be in the status as in FIG. 32.
In the time that follows, the second process continues to operate. Time series data “3” is inputted at start time of the sixteenth cycle, time series data “4” is inputted at start time of the seventeenth cycle, and time series data “5” is inputted at start time of the eighteenth cycle. Since the second process obtained [4, 5, 6] that are nearest two values, the processing unit 501 calculates and outputs “15” as the result. At end time of the eighteenth cycle, each part will be in the status as in FIG. 33.
The first user defined process (process to be updated) is executed in the first area on the device, and the second user defined process (old process) is executed in the second area. Here, update of the process is carried out when the old process in the second area is in execution. That is, the process to be updated being executed in the first area is stopped, and the circuit information of the circuit that executes the third user defined process (new process) is written in the first area. And execution of the new process is started, and the old process is stopped. As above, change from the old process to the new process is carried out.